Generally, integrated circuits have many transmission lines that carry signals between various portions of the chip during operation of the integrated circuit. Typically, the transitioning of digital data on a transmission line may cause noise in a power or ground supply which could degrade the quality of signals on the chip. With multiple transmission lines and multiple signals transitioning states, noise may be exacerbated. For example, this problem may be increased in recent 2.5D or 3D structures that include a plurality of chips with each having many transmission lines using common power and ground supplies.
One attempted solution to the noise generated is to create more power and ground inputs/outputs (I/Os). However, more power and ground I/Os generally result in an area penalty. The area penalty may be unacceptable for a high volume data line.
Another attempted solution is to reduce an inductance coupled to the power and ground supplies to reduce the noise. However, reducing the inductance may not be practicable for some applications because it may not meet a limitation of a package's minimum inductance and because manufacturing the inductance may be process intensive and expensive.
Accordingly, there is a need in the art to overcome the above stated problem without, for example, the above identified disadvantages of attempted solutions.